The key words in the name of the chip are ‘Level-Translating’. This has two bus connections, each with variable voltage levels. On side A the bus can be 0.9V to 5.5V. On side B the bus range ...
It detects the voltage level of I/O (VIN). When the voltage is in the range of VTLL to VTLH, the output OUT_RD is generated as a high level. When the voltage is lower than VTLL or higher than VTLH, ...
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