Design-Reuse10y
Layer 2 Switch Implementation with Programmable Logic Devices
The paper describes how, with a SOPC (System on a Programmable Chip) architecture embedded with a 32-Bit NIOS-II, a Layer 2 Ethernet switch can be implemented in a FPGA (Field Programmable Gate Array) ...
Design-Reuse10y
Cavium and XPliant Introduce a Fully Programmable Switch Silicon Family Scaling to 3.2 Terabits per Second
Flexibility using the XPA will allow new protocols to be implemented in weeks, not years. Introducing the CNX880xx Programmable Switch Silicon Family The CNX880xx family was built from the ground up ...